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SP6121 Demo Board Manual
FEATURES DC/DC Synchronous Buck Converter for Distributed Power Systems. SIP design provides complete, ready to use solutions for : Vin=3.0 - 7.0V Vout=1.25 - 5.0V I out=8.0A (no air flow required). High Efficiency: 86 to 95% Excellent Transient Response Small Size: 550X2500mils, vertical mounting Power Good output

DESCRIPTION The SP6121 DEMO Board is designed to help the user evaluate the performance of the SP6121 for use in a distributed power system. The SP6121 operates over an input voltage range of 3.0V to 7.0V, and can deliver efficiencies as high as 95%. The SP6121 Demo Board is a complete Power Supply ready for use in applications where high stability, excellent transient response, high efficiency and power density are critical concerns. The Demo Board, a completely assembled and tested PCB with surface mount components, has been designed as a SIP board that can be vertically mounted in an existing application.
Rev 7/25/01
BOARD SCHEMATIC and LAYOUT The SP6121 Demo Board is configured as a highly efficient, synchronous DC/DC buck converter. It has been optimized to deliver excellent thermal and EMI performance.
FIGURE 1. SP6121 Demo Board - layer 1, top view.
FIGURE 2. SP6121 Demo Board, layer 4, top view.
The SP6121 Demo Board has four, 2 oz copper layers that provide improved noise immunity and minimize power losses. Components are placed on the top and bottom sides of the PCB as shown on Figures 1and 2. The row of pads (1 to 11) at the edge of the board is designed for solderable pins such as the NAS Interplex forked pins (17 x 42 mil cross section). Pin connections to the demo board circuit are indicated in Figure 3. (Pad 11 is a no connect.)
Rev 7/25/01
2
U2 1 RESET Reset MR VCC SP708 C10 0.1uF NC PFO PFI GND 8 7 6 5
R5 10K
Vin +3.0V-7.0 V
7,8
C5 1.0uF R6 5.0 Q1 C6 47uF CERAMIC
2 3 4
9 POWER OK
C11 56pF
U1
1 C1 2.2uF 2 3 4 V cc GND V FB COMP PDRV NDRV ISET ISENSE 8 7 6 5
R2 2.3K
FDS6375 L1 1.6uH
1,2,3,4 V out
D1 Q2 FDS6690A R3 10K C7 R4 10K 0.1uF C8 470uF C9 470uF
2.5V
SP6121
R1 10K
5,6 GND 10 TRIM
C2 56pF
C3 3.9nF
FIGURE 3. SP6121 Demo Board Schematic.
Demo Board Component Selection The input capacitor, C6, can be either a ceramic or tantalum capacitor. Its choice depends on the user's system input voltage transient. If the highest possible efficiency is required, a ceramic 47uF capacitor is recommended. The demo board circuit includes a Schottky Diode, D1, across the low side switch. It prevents Q2's internal body diode from turning on and dissipating power during the nonoverlap time when both Q1 and Q2 are off. At a 500kHz switching frequency, these losses would decrease overall efficiency by 0.5 - 0.6%. The output voltage is set by the resistor divider: R3/R4. The output voltage is calculated using the following: ae R3 o VOUT = c + 1/VREF , e R4 o where VREF = 1.25V. For the SP6121 demo board where VOUT = 2.5V. Choosing R4 equal to 10K, then R 3 = R 4 = 10 K The considerations, tradeoffs and calculations required to select the power MOSFETs (Q1, Q2), the inductor (L1), the input and output capacitors (C1, and C6, C8, and C9,
Rev 7/25/01
3
respectively), and the current set resistor (R2), are discussed in detail in the SP6121 data sheet. USING THE DEMO BOARD To use the Demo Board, connect the input voltage, VIN to pins 7 and 8 and a ground, GND, to pins 5 and 6. Connect the load to pins 1, 2, 3, and 4. Pin 9 provides a logic level "power good" signal and Pin 10 is used for trimming the output voltage. When measuring efficiency, care must be taken to keep leads between measuring devices, the power supply (VIN) and the demo board as short as possible and the measurement probes should be connected to pins 4 (VOUT) and 7 (VIN). The SP708 power management controller IC (U2) on the demo board is used to generate a Power Good signal. On this demo board, when the voltage on the pin 6 (PFI) of U2 is 1.25V or less, U2's pin 7 (PFO) goes LOW. Pin 6 can be connected directly, or through a resistor divider, to VOUT or VIN. DEMO BOARD CHARACTERISTICS
96 94 92 Efficiency (%) 90 88 86 84 82 80 78 0 1 2 3 4 5 I load (A) 6 7 8 9 10
C6=330uF,5.0/1.9V C6=47uF, 3.3/2.5V C6=47uF,5.0/1.9V C6=330uF,3.3/2.5V
FIGURE 4. EFFICIENCY vs. I load. Vout=2,5V
0.02 0 Vout Tolerance (%) -0.02 3 -0.04 -0.06 -0.08 -0.1 -0.12 -0.14 Vin (V) I load=5.0A I load=3.0A
4
5
6
FIGURE 5. Line Regulation. Vout=2.5V
Rev 7/25/01
4
0.05 0 V out Tolerance (%) -0.05 0 -0.1 -0.15 -0.2 -0.25 -0.3 -0.35 I LOAD (A) Vin=3.3V Vin=5.0V
2
4
6
8
FIGURE 6. Load Regulation. Vout=2.5V
FIGURE 7. Load Step Response. I load step 0.4A to 6.0A. CH1-Vout; CH4-I load. Vin=5.0V, Vout=2.5V
FIGURE 8. Output Ripple. Vin=5.0V,Vout=2.5V, Iload=6.0A
Rev 7/25/01
5
DEMO BOARD RECOMMENDED PARTS: No. Qty
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 1 1 1 2 2 1 1 1 1 2 1 2 1 1 1 11 C1 C2,C11 C3 C5 C6 or or C7,C10 C8,C9 D1 L1 Q1 Q2 R1,R5 R2 R4,R3 R6 U1 U2 Pins
Part
Capacitor Ceramic 2.2uF/16V/X7R/10% Capacitor Ceramic 56pF/50V/X7R/10% Capacitor Ceramic 3.9nF/50V/X7R/10% Capacitor Ceramic 1uF/16V/X7R/10% Capacitor Tantalum 220uF/10V/10% Capacitor Tantalum 330uF/10V/20% Capacitor Ceramic 47uF/X7R/10V/10% Capacitor Ceramic 0.1uF/16V/X7R/10% Capacitor Tantalum 470uF/10V/10% Diode Schottky 30V/2.0A Inductor 1.6uH/15A/3.3 mOhm P-MOSFET 20V/8.0A/32mOhm N_MOSFET 30V/13A/10mOhm Resistor 10K/63mW/5% Resistor 2.1K/63mW/5% Resistor 10K/63mW/1% Resistor 10 Ohm/0.63mW/5% SYNCH. BUCK CONTROLLER Low Power Microprocessor Supervisory Circuits 17X42 mils Cross Section
Manuf.
Any Approved "-" "-" "-" "-" "-" "-" "-" "-" "-" PANASONIC FAIRCHILD FAIRCHILD Any Appoved "-" "-" "-" SIPEX SIPEX NAS Interplex
Manuf. P/N / PACKAGE
Package 1206 603 805 603 7343 1812 7343 603 7343 Package DO-214AA ETQ-P6F1R6SFA FDS6375/ SO-8 FDS6690A/ SO-8 Package 603 603 603 603 SP6121/SO-8 SP708/ uSOIC-8
Rev 7/25/01
6

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